DRAM TEC | 存储芯片测试工程师

Responsibility:

1. New DRAM product tech. support to customers(LPCAMM, MRDIMM, CMM-D, CSoDIMM, CUDIMM, LLM);

2. Attend tech. meeting with DRAM BE and CS contact window;

3. Quick FA support to N/C customers;

4. CPU vendor open lab activity.

Probation MBO:

New DRAM product design-in succesfully;

2. Regular meeting with customers and BE/CS(Weekly, QTR, Tech. meeting, issue meeting, etc.);

3. Improve customer's satisfaction with issue on-site support;

4. Setup open lab with Main CPU vendor to minimize DRAM issue in early stage.

公司地点:北京海淀区融科资讯中心B座B

公司简介:

职位发布者:余女士

上海三星半导体有限公司深圳分公司

融资阶段:

公司规模:

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