Summary
We are currently looking for a senior design engineer who will be responsible to High Speed Serdes Circuit Design and Verification. Experience with Burst Mode CDR in GPON/GXPON/GXSPON/10GEPON etc is a must.
Job description:
Requirements:
Responsible for the SerDes IP design from initial concept and specification through final verification and integration in SOC.
Transistor-level circuit design, simulation, and layout guidance for analog /mixed-signal integrated circuit.
Familiar with BMCDR and GPON/GXPON/GXSPON/10G EPON etc protocols.
Consolidate the design and verification methodologies for high speed circuit.
Candidate should have working knowledge of a set of common SerDes standards and their electrical requirements.
Hands-on experience to drive lab testing, debug and data analysis.
Hands-on experience in advanced CMOS technologies, design with FinFet technology.
Major in EE, CS or related, Master Degree with 5+ years.